An analysis of aLIGO PD circuit

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This post builds on a couple of earlier posts of mine, LIGO modulation and RLC filters. In this post we will look into the Advanced Laser Interferometer Gravitational-Wave Observatory (aLIGO)’s photodiode circuit and analyze its noise performance. (Also see a follow up post: An SNR analysis of aLIGO circuit)

The actual circuit in use at the moment is shown in Fig. 1, and we will refer to it as v5 in the following pages as it is the version number.

The actual amplifier circuit used in [the current set up.](https://dcc.ligo.org/LIGO-D1101124/public)

Figure 1: The actual amplifier circuit used in the current set up.

Let us take a closer look at the photodiode bias circuit as shown in Fig. 2. The diode is under reverse bias, and it will behave as a current source when exposed to light.

+18VC391µFTantalum50VLM317TINOUTADJR29Radj750RB160M-60D6R30249C5610µFTantalum35VD9RB160M-60C4510µFTantalum35VC3610nFPhotodiodecasePDAnodettvttc39ttD6ttD9ttR29ttR30ttlmttC36ttC45ttC56ttpttsoutnC39TnROUTnR29T
This voltage regulator circuit applies reverse bias to the photo diode. Hover over the orange-colored elements to see what their functions are. <span class='plus'>... [+]</span> <span class='expanded-caption'>  Overall the circuit enables the photodiode to operate as a current source. Its output is fed to the notch farm and the frequency selectors.</span>

Figure 2: This voltage regulator circuit applies reverse bias to the photo diode. Hover over the orange-colored elements to see what their functions are. … [+] Overall the circuit enables the photodiode to operate as a current source. Its output is fed to the notch farm and the frequency selectors.

The output voltage is set to \(5\)V via every electronics hobbyist’s favorite LM317T voltage regulator with some reverse bias protection. Note the two parallel capacitors in the output, \(10\mu\)F and \(10\)nF. The \(10\)nF is a ceramic capacitor which is used to reduce to equivalent serial resistance at higher frequencies to dampen possible oscillations in the output voltage.

The anode of the phododiode is fed into a farm of fine-tuned notches as in Fig. 3.

PDAnodeL1390nHC440pFC2180pF208pFexactResFreq.:18.2MHzL2180nHC1040pFC782pF109pFexactResFreq.:36.4MHzL4100nHC1730pFC1668pF87pFexactResFreq.:54.6MHzL5100nHC2620pFC2520pF31pFexactResFreq.:91MHzSelectorFiltersblbl1blbl2blbl4blbl5ittb1ittb2ittb4ittb5pdttiatl1txtl2txtl4txtl5txt
Notch farm to remove various harmonics. Hover over the coils to see their properties. Hover over the info icons to see bode plots <span class='plus'>... [+]</span> <span class='expanded-caption'>  The line continues to frequency selector circuit.</span>

Figure 3: Notch farm to remove various harmonics. Hover over the coils to see their properties. Hover over the info icons to see bode plots … [+] The line continues to frequency selector circuit.

Each block is tuned such that the natural frequency \(1/\sqrt{LC}\) is around the target frequency to be carved out. Hover over the info icon, , to see the corresponding Bode plot, and the coils to see their frequency response. In the Bode plot. we just use the series resistance along with the inductance. Skin depth effects and shunt capacitance are not included in the Bode plots. We will certainly include them later.

The selectors are shown in Fig. 4.

PDAnodeL7220nHC30100nFDCfilterDCTIAVirtualGNDC1222pFL3390nHC1520pF32.2pFexactResFreq.:45.5MHzHITIAC35150pFL91.8µHC3840pF173.7pFexactResFreq.:9.1MHzLOWTIAblbl0blbl1blbl1ittb7ittb3ittb9l7txtl3txtl9txtpdatxtdctxtlowtxthitxt
Selector filters. Hover over the coils to see their properties. Hover over the info icons to see bode plots. <span class='plus'>... [+]</span> <span class='expanded-caption'>  The line continues to transimpedance amplifier (TIA).</span>

Figure 4: Selector filters. Hover over the coils to see their properties. Hover over the info icons to see bode plots. … [+] The line continues to transimpedance amplifier (TIA).

The Trans-impedance amplifiers (TIA) are shown in Fig. 5.

++5V5VHITIAR1249.9R14453R749.9C1410nfRFHI++5V5VLOWTIAR2249.9R26453R1649.9C4010nfRFLOW+5V5VDCTIAR1649.9L810µHC20100pfR1649.9C4010nfDCblhittbhbllittblbldittbd
Basic inverting amplifiers with a gain of $10$ for the RF outputs. <span class='plus'>... [+]</span> <span class='expanded-caption'>  DC amplifier has a couple more inductive/capacitive elements to further supress the AC components.</span>

Figure 5: Basic inverting amplifiers with a gain of \(10\) for the RF outputs. … [+] DC amplifier has a couple more inductive/capacitive elements to further supress the AC components.

Table 1 shows the values of the filter elements.
Table 1: The values of the essential circuit elements.
DC readout
9.1MHZ read out
45.5MHz readout
18.2MHz notch
36.4MHz notch
54.6MHz notch
91MHz notch
L7C30L9C35+C38L3C12+C15L1C2+C4L2C7+C10L4C16+C17L5C25+C26
220nH100nH1.8 \(\mu\)F173.7pF390nH32.2pF390nH208pF180nH109pF100nH87pF100nH31pF

We build this circuit in LTspice as shown Fig. 6 and simulate. The LTspice file can be found here.

LTSpice circuit for simulation.

Figure 6: LTSpice circuit for simulation.

We can collect the LTspice simulation data via Python. It is convenient to measure the noise at the OPAMP output in terms its input current equivalent: \[\begin{equation} \text{Equivalent Current Noise}= \frac{(V/\text{gain})^2}{2 e }, \tag{1} \end{equation}\] where the gain is the transimpedance. We plot the noise spectrum in Fig. 7.

Baseline noise for the readout ports DC, 9.1MHz, and 45.5MHz. The critical values are marked on the plot.

Figure 7: Baseline noise for the readout ports DC, 9.1MHz, and 45.5MHz. The critical values are marked on the plot.

The values annotated in Fig. 7 are the values we will want to reduce and they provide us with a benchmark. Can we beat these values and design a circuit with lower noise? That is exactly what we are going to do in following posts. Find a warm up SNR analysis here An SNR analysis of aLIGO circuit

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